The present invention relates to a method for the formation of a siliceous coating film on the surface of a substrate. More particularly, the invention relates to a method for the formation of a siliceous coating film having high resistance against formation of cracks to serve as a planarizing layer or an insulating layer on the surface of a substrate such as a substrate material for the preparation of semiconductor devices, liquid crystal display panels and the like which can withstand a relatively high temperature of heat treatments.
By virtue of the excellent properties in respect of heat resistance, abrasion resistance, corrosion resistance and others, silica-based coating films are widely formed and employed in the manufacturing processes of electronic industries, for example, as a planarizing covering layer on a semiconductor substrate provided with a circuit wiring layer of a metal or other conductive materials forming level differences on the substrate surface, and as an electric insulating layer, in semiconductor devices, between the substrate surface and a metallic circuit wiring layer thereon and between two metallic circuit wiring layers or, in liquid crystal display panels, between the base glass plate and a transparent electrode layer of ITO (indium-tin oxide) or between the ITO layer and the oppositely facing electrode layer.
Several methods are known in the art and practiced in recent years for the formation of a silica-based coating film as mentioned above including a method in which a substrate surface is coated with a coating solution containing a polysilazane compound as a film-forming constituent followed by drying and a heat treatment to convert the polysilazane film into a silica-based film and a method in which the coating solution contains a polysilazane compound modified by a reaction with an alkyl amine or alkanol amine compound (see, for example, Japanese Patent Kokai 5-121572, 6-73340, 6-128529, 7-2511 and 9-157544).
Each of the above described methods is taught to be applicable to the surface of a substrate having a circuit wiring layer of a metal such as aluminum having relatively low heat resistance not to give a high reliability limiting temperature. In fact, the heat treatment for the formation of the silica-based coating film is conducted at a relatively low temperature of about 450 to 500.degree. C. in consideration of the low heat resistance of the aluminum layer.
The above mentioned polysilazane-containing coating solution, which is used usually in a process involving a baking treatment at 450 to 500.degree. C., is not suitable for the formation of a coating film of silica even by increasing the baking temperature to 550 to 800.degree. C. due to the problem that the rate of oxidative conversion of the polysilazane layer into a silica film cannot be high enough sometimes resulting in an incompletely oxidized silica-based film leaving Si--H linkages and N--H linkages originating in the starting polysilazane compound not to exhibit high etching resistance.
It is also a known method disclosed in Japanese Patent Kokai 4-63833 that a coating solution, which contains a polysilazane compound modified or inactivated beforehand by the reaction with hexamethyl disilazane and the like to destroy the active hydrogen atoms bonded to the silicon atoms or nitrogen atoms in the polysilazane compound, is used for the formation of a coating layer. This method, however, is not without a problem, in particular, when applied to a surface having stepped level differences because, although the silica coating film formed from an inactivated polysilazane compound has high hardness and exhibits good etching resistance on the raised areas of the stepped substrate surface, the coating film formed on the recessed areas of the stepped substrate surface sometimes exhibits only poor etching resistance adversely affecting the performance of the semiconductor devices.
When the substrate, on which an insulating or planarizing layer of silica is to be formed, has high heat resistance to withstand a temperature of 800 to 1000.degree. C. as is the case when the circuit wiring layer is formed from a more heat-resistant material such as polycrystalline silicon, it is an established prior art that a coating layer of phosphosilicate glass (PSG) is first formed on the substrate surface by the chemical vapor-phase deposition (CVD) method followed by a reflow heat treatment undertaken at about 1000.degree. C. In addition to a disadvantage due to low productivity and high costs, a problem in this method is that, as a consequence of this high temperature for the reflow heat treatment, the performance of the semiconductor devices prepared by this method is adversely affected due to excessive diffusion of the dopant through the source layer and drain layer of the device.
As a method for the formation of a silica-based insulating or planarizing layer on a substrate surface without necessitating a heat treatment at such a high temperature mentioned above, the so-called SOG (spin-on-glass) method is proposed by using a coating solution. This method, however, cannot substitute the CVD method mentioned above because the silica-based coating film formed by this SOG method using a conventional coating solution cannot be thick enough without a trouble of crack formation, namely, with a low crack-forming thickness limit.